A field guide to memory ordering on ARMv9, x86, and WASM
Twelve years of informal notes distilled into one reference: relaxed vs. acquire-release vs. seq-cst, side-by-side across three ISAs, with the raw litmus tests you can clone and run tonight.
1,847 peer-reviewed, benchmarked long-reads by senior engineers — every piece checked by a second practitioner before it ships.
Four pieces drafted, double-reviewed, and benchmarked in our Berlin lab over the past eleven days.
Twelve years of informal notes distilled into one reference: relaxed vs. acquire-release vs. seq-cst, side-by-side across three ISAs, with the raw litmus tests you can clone and run tonight.
Three implementations, one packet capture rig, and the four places 0-RTT quietly breaks your replay protection.
Read →A before-and-after benchmark across 41 open-source C++ projects, with the three optimisations that consistently regress.
Read →A reproduction of the classic Beckmann paper, run on real Optane and a Micron 7450 — with the surprising row layout that wins.
Read →Every article begins with a senior practitioner — never an intern, never an unnamed contributor — drafting against a working problem they have shipped. The draft is then handed to a second engineer on the editorial board for a line-by-line technical review: claims are checked, code is run, and assumptions are challenged. Median turnaround from first draft to a published, peer-reviewed piece is eleven days.
If the piece contains benchmarks, those benchmarks run again in our Berlin lab across ARM, x86, and WASM on reproducible hardware, and the raw data ships alongside the article on GitHub. What you read is what was measured — not what a model hallucinated, and not what someone thought they remembered measuring last quarter.
One email every Tuesday. The week's peer-reviewed long-reads, a benchmark note from the lab, and one quiet recommendation from the editorial board. Read by 30,000+ working engineers.
No tracking pixels in the body. Unsubscribe lives at the top of every issue.